$ cat jobs/asic-power-engineer-principal-positron-ai-e874537ccfb9.json
ASIC Power Engineer, Principal
About Positron AI Positron AI specializes in developing custom hardware systems to accelerate AI inference. These inference systems offer significant performance and efficiency gains over traditional GPU-based systems, delivering advantages in both performance per dollar and performance per watt. Positron exists to create the world's best AI inference systems. Role Overview This role owns power architecture, estimation, optimization, and verification across Positron's AI accelerator roadmap. You will define power methodology from architectural modeling through silicon validation, ensuring industry-leading performance-per-watt while meeting aggressive power and thermal constraints. Key Responsibilities Power Architecture & Strategy Own the overall chip power strategy, defining approaches for dynamic power, leakage, clock power, memory power, interconnect power, SerDes power, idle power, and peak power. Power Modeling Develop accurate power models across the full development lifecycle, from early architectural estimation through RTL and gate-level estimation. Perform vector-based and activity-driven power analysis to validate estimates against real workload behavior. Power Optimization Drive power optimization techniques including clock gating, operand isolation, power gating, voltage islands, and multi-Vt optimization. Apply memory, pipeline, toggle-reduction, and data-movement optimization techniques, including approaches tailored to AI workloads. Power Integrity Partner with the backend team on IR drop, electromigration (EM), power distribution, and power grid planning. Define power-on sequencing, power domains, reset sequencing, isolation, retention, and UPF/CPF specifications. Power Verification Own power-aware simulation and UPF verification. Lead reset verification, low-power state validation, wakeup validation, and power sequencing verification. Cross-Functional Collaboration Partner closely with Architecture, RTL, Backend, Firmware, Thermal, Packaging, and Sy