$ cat jobs/principal-firmware-middleware-engineer-renesaselectronics-196b3813a42e.json
Principal Firmware/Middleware Engineer
As the Principal Firmware Architect for UALink Switch Products, you will serve as the technical visionary responsible for defining, designing, and driving the end-to-end embedded software and firmware architecture for our next-generation AI cluster scale-up switches. In this high-impact role, you will bridge the gap between cutting-edge silicon (ASICs) and upper-layer cluster orchestration software. You will define how firmware manages complex scale-up topologies, ensures raw hardware performance (maximizing bandwidth and minimizing latency), and maintains absolute reliability across thousands of connected AI accelerators. 1. Architectural Definition & Design Fabric Firmware Architecture: Architect and specify the low-level firmware running on internal microcontrollers within the UALink Switch ASIC. Hardware-Software Co-Design: Collaborate heavily with ASIC design, logic design (RTL), and verification teams to define hardware-software interfaces, registers, scratchpads, and memory maps. Protocol Implementation: Define the firmware stack to support UALink physical, link, and transport layers, managing credits, routing tables, and flow control. 2. Initialization, Boot, & Fabric Management Link Initialization & Training: Design deterministic, fast link-training state machines to bring up ultra-high-speed die-to-die and chassis-to-chassis UALink connections. Topology Discovery & Routing: Architect efficient algorithms for runtime topology discovery, dynamic routing, and credit management to prevent fabric congestion. Platform Orchestration: Lead the design of SDKs and APIs that expose switch functionality to baseboard management controllers (BMCs) using OpenBMC and Redfish APIs. 3. Performance, RAS, & Security Latency & Bandwidth Optimization: Fine-tune bare-metal execution paths to guarantee deterministic low latency for collective communication primitives (e.g., All-Reduce, All-to-All). Advanced RAS (Reliability, Availability, Serviceability): Design robust error-hand