Principal System Engineer

As a Principal System Engineer/Product Definer in our Power Management Group, you will be the primary architect defining the next generation of processor core (VCORE) power solutions for laptops and Edge AI platforms. You will own the product definition for multiphase voltage regulator (VR) solutions that power leading x86 CPU/APU and Edge AI SoCs, ensuring full compliance with Intel IMVP (IMVP9 / IMVP9.1 and successor) and AMD SVI2 / SVI3 serial-VID specifications. This high-impact role connects the compute-silicon vendors who define the core-power specifications (Intel, AMD, and NVIDIA) with the OEMs who build the end platforms (e.g., Dell, HP, Lenovo), aligning both with internal R&D to ensure Renesas delivers best-in-class solutions for efficiency, load-transient response, and power density in the thermally- and space-constrained laptop and Edge AI form factors. Key Responsibilities • Customer Architecture Definition: Collaborate directly with laptop OEMs/ODMs and compute-silicon vendors (Intel, AMD, and Edge AI/GPU silicon partners) to translate platform power requirements, IMVP/SVI compliance targets, RFI into Engineering Requirements Specifications with architectural and electrical specifications for the VCORE, VCCSA/SoC and GT/NPU rails. • System Architecture & Efficiency Analysis: Conduct topology identification, phase-count optimization, and detailed efficiency studies for multiphase buck / SPS (Smart Power Stage / DrMOS) core-rail architectures using system-level simulation tools (e.g., SIMPLIS, MATLAB, or similar). Develop high-fidelity behavioral models to evaluate architectural trade-offs, Adaptive Voltage Positioning (AVP) load-line, DVID/dynamic-VID transients, and loop stability against Intel IMVP and AMD SVI transient and light-load (phase-shedding) requirements. • Schematic & Layout Analysis: Review and update system models based on PCB schematics and layouts to account for real-world PDN parasitics (ESL/ESR) and the “last-inch” interconnect that