$ cat jobs/staff-package-design-engineer-renesaselectronics-5320ce12256c.json
Staff Package Design Engineer
Renesas is a global leader in microcontrollers, analog, power, and SoC products, delivering semiconductor solutions that power billions of connected, intelligent devices. As the industry shifts toward heterogeneous integration, Renesas is expanding its advanced packaging capabilities and seeking a talented Staff Package Design Engineer to join our Advanced Silicon Packaging team located in our Austin, TX or Tempe, AZ offices. In this role, you will design and deliver next-generation, high-performance package solutions that support our world-class product portfolio across automotive, industrial, infrastructure, and IoT applications. In this role, you will work at the intersection of IC design, advanced package development, and system-level implementation. You will play a critical role in designing and delivering next-generation, high-performance semiconductor package solutions, including power modules, chiplet-based architectures, FCBGA, SiP, WLCSP, wire-bonded, QFP, and QFN packages supporting automotive SoCs, industrial IoT microcontrollers, and AI-enabled embedded computing platforms. This role requires strong technical depth in package layout execution, manufacturability, assembly process constraints, and cross-domain co-design with global silicon design, signal integrity/power integrity, thermal, reliability, and product engineering teams. Key Responsibilities Execute package layout design and development for advanced package technologies, including power modules, FCBGA, SiP, WLCSP, and multi-chip modules. Develop and maintain package CAD databases, ensuring accuracy and adherence to package design guidelines, DFM, and DFA requirements to support manufacturability, yield, and long-term reliability. Manage the package design cycle, including schematic creation, netlist import, footprint assignment, layout implementation, verification, and generation of manufacturing release outputs such as Gerber/drill data, fabrication drawings, assembly drawings, bump maps, and