$ cat jobs/staff-package-development-engineer-renesaselectronics-fb410e624fa5.json
Staff Package Development Engineer
The Package Development Engineer is responsible for developing, qualifying, and industrializing semiconductor package solutions that meet product performance, reliability, manufacturability, cost, and schedule requirements. This role works closely with cross-functional teams, including silicon design, package design, manufacturing, reliability, quality, and OSAT partners to bring new package technologies from concept through high-volume manufacturing. The ideal candidate combines strong semiconductor packaging expertise with a hands-on, problem-solving mindset and the ability to drive complex technology development activities in a global environment. Bachelor's degree in Packaging Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, Physics, Electrical Engineering, or a related technical discipline. Minimum 5+ years of experience in semiconductor package development, package integration, or advanced packaging technologies. Strong knowledge of semiconductor assembly processes, including, Wafer backgrind Wafer dicing Die attach Flip-chip assembly Wire bonding Underfill Encapsulation and molding Ball attach Package singulation Surface-mount technology (SMT) Experience developing and qualifying semiconductor packages in collaboration with OSAT partners. Knowledge of Design of Experiments (DOE), statistical analysis, and structured problem-solving methodologies. Experience conducting package reliability testing, failure analysis, and root-cause investigations. Strong analytical, project management, and communication skills. Ability to work independently and effectively within cross-functional global teams. Preferred Qualifications Master's degree or Ph.D. in Packaging Engineering, Mechanical Engineering, Materials Science, Physics, Chemistry, or a related field. Experience with advanced packaging technologies such as: Flip-Chip CSP (FCCSP) System-in-Package (SiP) Fan-Out Packaging (FOPLP/FOWLP) Wafer-Level Packaging (WLP/WLCSP) 2.5D/3D Packaging