$ cat jobs/principal-architect-performance-analysis-and-modeling-d-matrix-88680aa65962.json
Principal Architect, Performance Analysis and Modeling
At d-Matrix, we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration. We value humility and believe in direct communication. Our team is inclusive, and our differing perspectives allow for better solutions. We are seeking individuals passionate about tackling challenges and are driven by execution. Ready to come find your playground? Together, we can help shape the endless possibilities of AI. Working onsite at our Santa Clara, CA, headquarters 3 days per week hybrid. Will consider remote in the United States. Will consider remote in the United States. The role: Principal Software Engineer, Performance Analysis and Modeling d-Matrix is looking for a computer engineer to help analyze and model performance across the hardware/software boundary of our AI inference accelerators. This role focuses on emerging hardware technologies (DIMC, D2D, 3D-DRAM) and emerging workloads (generative inference, multi-modal LLMs) — building the analytical models and simulation tools that let the architecture team project performance on current and future d-Matrix silicon. You'll work closely with Hardware Design, Compiler, Inference Server, and Kernels teams, translating workload analysis into concrete modeling inputs and surfacing HW/SW improvement opportunities. This is a hands-on technical contributor role within the broader architecture organization. What You Will Do - Analyze emerging ML workloads, multi-modal LLMs, CoT reasoning models, and video/audio generation to identify performance-relevant properties. - Build and maintain analytical performance models that project behavior on current and future d-Matrix hardware generations. - Develop and extend architecture simulators to support performance analysis of proposed HW/SW features. - Partner with hardware design, compiler, inference
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